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TFLN-OPTILINK

Develop a TFLN-based CPO platform for scale-up, scale-out and chip-to-chip optical links with direct-drive electronics, low-loss coupling and thermal management.
Partner Call offen bis: End of 2026
Projekt­start: Q1 2027

Ziel­set­zung

The project aims to develop a versatile TFLN-based photonic integration platform for high-speed, energy-efficient optical data communication, bridging the gap between academic research and industrial high-volume manufacturing.
The project will address three communication hierarchies: scale-out links for cluster-scale interconnects, scale-up links for high-density intra-rack communication, and chip-to-chip links based on optical interposers.
The main challenges and research topics are:

  • Development of high-speed, power-efficient TFLN electro-optic modulators using SAL’s 8-inch thin-film lithium niobate wafer processing platform.
  • Integration of high-speed electronic integrated circuits, including modulator drivers, TIAs and SerDes, through electronic-photonic co-design.
  • Development of a direct-drive electronic-photonic interface to reduce power-hungry components and overall interconnect power consumption.
  • Development of low-loss automated fiber-to-chip coupling, targeting an insertion loss below 1 dB.
  • Mitigation of electrical parasitics through co-designed silicon/RDL interposer routing and high-aspect-ratio through-silicon vias.
  • Thermal isolation and management of thermal crosstalk between photonic integrated circuits and high-power electronic/logic dies.
  • Development of low-loss assembly and packaging methods for heterogeneous 2.5D/3D integration.
  • Validation of the platform across scale-out, scale-up and chip-to-chip application scenarios.

Erwartete Ergebnisse 

  • TFLN-based photonic platform for high-speed and energy-efficient optical communication.
  • High-speed TFLN electro-optic modulators and driver-compatible photonic devices.
  • Direct-drive electronic-photonic integration concept with suitable high-speed EICs.
  • Low-loss fiber-to-chip coupling with a target insertion loss below 1 dB.
  • Validated approaches for electrical parasitic mitigation and thermal management.
  • Heterogeneous 2.5D/3D integration samples combining photonic and electronic components.
  • Demonstration of DSP-less optical links for scale-out cluster networks up to 100 m.
  • Demonstration of wavelength-division-multiplexed scale-up links using high-speed 200G PAM4.
  • Package-level demonstrators and comprehensive electrical, optical, thermal and reliability validation.
  • Final integrated demonstrator set and exploitation package for industrial partners.

 

 

 

Who we are looking for

  • Tier-1 end users: system integrators or hyperscalers able to define real-world deployment requirements and host final validation testbeds.
  • ASIC/RFIC IDMs and fabless companies: providers of advanced-node logic chiplets and high-performance electronic integrated circuits, including drivers, TIAs and SerDes.
  • Hybrid integration specialists: partners with expertise in efficient 2.5D/3D chiplet assembly and heterogeneous integration.
  • Redistribution-layer (RDL) manufacturers and suppliers for advanced interconnect and packaging.
  • Equipment, manufacturing and technology partners contributing to photonic fabrication, packaging, assembly, testing or validation.
  • Industrial partners across the value chain interested in CPO, TFLN photonics, high-speed electronics and optical communication systems.

 

Kontakt

Business Development
Lisa Kainz MA
Business Development Microsystems
Graz
+43 664 88 964 965
lisa.kainz@silicon-austria.com

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