Ihr Ansprechpartner

Dipl.-Ing. Dr. Rudolf Heer

Head of Research Unit Electronic Sensors

Telefon: 0664 88 200 197
E-mail: rudolf.heer@silicon-austria.com

Ihr Ansprechpartner

Dr. Michael Ortner

Senior Researcher Microsystem Technologies

Telefon: +43 (0)4242 56300 219
E-mail: michael.ortner@silicon-austria.com

Ihr Ansprechpartner

Lothar Ratschbacher, PhD

Senior Scientist Embedded AI

Telefon: 0664 88 200 214
E-mail: lothar.ratschbacher@silicon-austria.com

Kommende Science Talks

Science Talks

Die Science Talks sind fixer Treffpunkt für den Austausch zu wissenschaftlichen Themen. Externe Interessenten und SAL MitarbeiterInnen treffen sich regelmäßig und referieren über neueste Erkenntnisse in ihren Fachbereichen.  Der Zugang zu den Vorträgen ist offen – jeder ist willkommen!

Machine learning based sparse estimation

Dr. Péter Kovács
Institute of Signal Processing (JKU Linz)
SAL Linz
Altenberger Strasse 69
4040 Linz
Dienstag, 28.07.2020

In his Science Talk, Dr. Péter Kovács talks about "Machine learning based sparse estimation".

The concept of sparsity has been studied for nearly a century, but it revealed its true potential nature due to the advent of compressed sensing in 2006. The theory suggests that a sparse signal can be reconstructed by exploiting only a few measured values, which can go below the fundamental Nyquist sampling rate. Another interpretation of sparsity can be given by Occam's razor: "among competing representations that predict equally well, the one with the fewest number of components should be selected". In this project, we develop machine learning algorithms to utilize sparsity in various signal processing applications. As a case study, we consider the problem of thermographic image reconstruction in non-destructive material testing.

Nanoelectronic computing opportunities beyond CMOS era

Prof. Dr. Walter M. Weber
Institute of Solid State Electronics
TU Wien
SAL Villach
High Tech Campus Villach
Europastraße 12
9524 Villach, Austria
Montag, 22.06.2020

Prof. Dr. Walter M. Weber is going to give a talk on "Nanoelectronic computing opportunities beyond CMOS era".

Silicon and germanium nanowires with diameters down to 3 nm exceptionally combine unique one-dimensional electronic transport properties with the mature material know-how of highly integrated semiconductor processing technology. In addition of providing conduction channels that can bring conventional field effect transistors to the ultimate scaling limits, the physics of group IV nanowires endow the realization of novel electronic device and sensor principles. To truly exploit the exceptional properties for sensing and logic computation, such innovations need to be driven across the research value chain of electronics by engineering their integrability in modern semiconductor manufacturing flows, by building and testing reliable circuits and by verifying system compatibility under realistic conditions. Throughout this presentation, I will show concepts developed in my research group based on atomically abrupt nano-junctions and strain induced phenomena in semiconductor nanowires enabling reconfigurable electronics for beyond CMOS computing as well as hardware security applications.