- Titel: High Speed Cable Measurement and Modelling
- Cooperative research project
- Project duration: 10 months
High Speed Cable Measurement and Modelling
Advanced post-silicon validation systems are operated with both high-speed digital circuits as well as very sensitive low noise analog circuits. The cables used for suchlike hardware validation platforms need to guarantee highest performance in terms of signal and power integrity (SI/PI) to enable high transition speeds and undisturbed signal transmission. Careful design of the interconnection layer between the device under test (DUT) and the measurement instrumentation is required. To avoid costly and time-consuming design spins of DUT specific validation hardware (HW), advanced design methodologies with special attention to noise mitigation, power integrity (PI) and signal integrity (SI) are required.
Scope of this cooperative project is to develop a robust modelling and simulation methodology to quickly and accurately assess SI/PI and noise isolation performance of newly developed interconnect hardware by simulation. Modelling of the intermediate cable connection enables to optimize transmission parameters, allowing highest precision up to several GHz of signal bandwidth. Aim of this project is to analyze the transmission features of a custom very-high-pin-count harness (>100 pins) by 3D simulation. The generated simulation model will be validated against S-parameter and time domain measurements.
- Performance comparison of different custom connector types based on 3D simulation
- 3D modelling of the complete interface hardware between DUT and measurement equipment
- Development of a measurement methodology to extract SI/PI and noise isolation parameters of a high-speed data cable for the validation of simulated values.
Your contact person
DI Dr. Bernhard Auinger
Head of Research Unit | Coexistence & Electromagnetic Compatibility (CEMC)
Cooperative research project, which belongs to SAL research program 1 “Virtual Prototyping and Model based Design with Hardware-in-the-Loop (HIL)”.