Partner Call open until: January 11, 2023

Start of the project: Q1 2023


  • To establish processes for TSV fabrication, protection, integration, and handling
  • To propose via filling approaches after TSV processing
  • To adapt temporary bonding technologies for high-yield TSV handling
Silicon Wafer with microchips used in electronics for the fabrication of integrated circuits

2.5 & 3D integration using through-silicon via (TSV) wafers has attracted much attention in recent years for both front-end foundries and back-end packaging. In this project, SAL & suitable partner(s) will focus on the development of TSV wafer integration processes such as temporary bonding, via filling, thinning and debonding – specifically tailored for advanced sensor/sensing solutions. The selection of bonding and filling technologies as well as materials compatible with the TSV processing temperature is a part of this project. The assessment will cover simulation, wafer processing in cleanroom environment as well as reliability analysis.  

Expected results

  • Enhancement of TSV integration technologies
  • Established TSV filing processes
  • Temporary bonding & debonding materials & processes for TSV

Member Area